A Guest Lecture on the topic “Open source high level Hardware Description Languages” was held at KIIT School of Electronics Engineering (SoEE) on 31st July, 2021 on Virtual Mode. Mr. Satya Rajesh Medidi, the guest speaker, discussed about the relevance of Hardware Description Language (HDL).The lecture helped in understanding the challenges faced by the industry and academia in using the Verilog. He discussed the open source Bluespec System Verilog (BSV). This combination of high level and full synthesizability enables many of the activities that were previously only done in software simulation. They can now be moved easily to FPGA based execution (whether the design is eventually bound for ASICs or FPGAs) and can speed up the execution by three to six orders of magnitude (1000X to 1,000,000X). Applications include cycle-accurate multi-core processor architecture models running real operating systems and real applications.
Mr. Satya Rajesh Medidi, presently working as Scientific Officer/ Engineer – E, Electronics and Instrumentation Group, Indira Gandhi Centre for Atomic Research, Kalpakkam Tamilnadu has over 10 years of industrial experience. His current areas of interest are in the fields of FPGA based systems design, Embedded Systems and Deep Learning.
Prof. Sukanta Kumar Sabat, Associate Professor, SoEE organized the lecture as a part of the Speak and Search Lecture Series. Program heads, faculty members, research scholars, M.Tech students attended the lecture. The speaker lauded the noble work of Dr. Achyuta Samanta, Founder, KIIT & KISS and conveyed his good wishes to him. Prof. Satish Kumar Gannamaneni, Assistant Professor, SoEE introduced the guest and proposed vote of thanks.